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- 4-bit binary full adder
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- dual negative edge triggered J-K flip-flop with preset, common clock, and common clear
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- Dual J-K Flip-Flops with preset and clear function
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- 4-bit bistable latch
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- Dual D-type Positive Edge-triggered Flip-Flops
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- dual D positive edge triggered flip-flop with preset and clear
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- dual J-K flip-flop with clear
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- 8-bit equality comparator
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- 4 x 4 Register File With 3-State Outputs The TTL
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- octal bus transceiver
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- 8-bit shift registers with output latches three-state parallel outputs
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- octal D-type edge-triggered flip-flop with three-state outputs
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- octal D-type transparent latch with three-state outputs
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2-Wide 4-Input AND-OR-INVERT Gate
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- non-inverting octal buffer with three-state outputs
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- inverting octal buffer with three-state outputs
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