74LS379 DIP 4 Bit D Type Parallel Register With Buffered Common Enable

The 74LS379 is a 4 bit D type parallel register designed for temporary storage and transfer of digital data in synchronous logic circuits. It contains four edge triggered D type flip flops with a buffered common enable input allowing controlled data storage and output.

This integrated circuit belongs to the LS TTL logic family and is commonly used in digital registers data buffering circuits and microprocessor interface applications. The DIP package makes it suitable for breadboard prototyping educational experiments and PCB based digital designs.

Key Features

• 4 bit D type parallel register
• Buffered common enable control input
• Edge triggered synchronous data storage
• Parallel data input and output
• TTL compatible logic levels
• Suitable for data storage and register circuits
• DIP package suitable for prototyping and PCB mounting

Specifications

• IC Model = 74LS379
• Logic Type = 4 bit D type parallel register
• Logic Family = LS TTL
• Number Of Bits = 4
• Package Type = DIP
• Control Input = Buffered enable
• Operating Voltage = 4.75V to 5.25V
• Application = Data storage register and digital logic circuits

Interfaces

• D0 = Data input bit 0
• D1 = Data input bit 1
• D2 = Data input bit 2
• D3 = Data input bit 3
• Q0 = Data output bit 0
• Q1 = Data output bit 1
• Q2 = Data output bit 2
• Q3 = Data output bit 3
• EN = Enable control input
• VCC = Power supply
• GND = Ground